Examples of edu.byu.ece.rapidSmith.design.Port

edu.byu.ece.rapidSmith.design.Port
This class represents the ports used to define the interfaces of modules in XDL. They consist of a unique name, the instance to which they are connected and a pin name on the instance. @author Chris LavinCreated on: Jun 22, 2010

          }
          if(clkname.endsWith("_")){
            clkname = clkname.substring(0, clkname.length()-1);
          }
          
          Port newPort = new Port(clkname +"_inport",port);
          hardMacro.getPorts().add(newPort);
          port.setPort(newPort);
          
        }

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          int num = 0;


          for(Pin p : net.getPins()){
            if(!p.isOutPin()){
              Port newPort = null;
              if(net.getName().startsWith("GLOBAL_LOGIC")){
                newPort = new Port(net.getName()+"_inport" + num,p);
                hardMacro.getPorts().add(newPort);
              }
              else{
                String type = "0";
                if(net.getType() == NetType.VCC){
                  type = "1";
                }
                newPort = new Port("GLOBAL_LOGIC"+type+"_"+(uniqueGL++)+"_inport" + num,p);
                hardMacro.getPorts().add(newPort);
              }
              
              // Create a new net for each pin created
              Net newNet = new Net();

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          instancesToRemove.add(pin.getInstance());
          outputNames += "-" + pin.getInstanceName();
          net.getPins().remove(pin);
        }  
        net.getPIPs().clear();
        Port newPort = new Port(outputNames+"_outport",net.getSource());
        hardMacro.getPorts().add(newPort);
        net.getSource().setPort(newPort);
      }
      else{
        // Remove the net, we'll create new nets for each IOB 
        netsToRemove.add(net);
        
        // Remove the TIEOFF, Xilinx will choke if we don't
        if(net.getSource() == null){
          failAndExit("This net does not have a source: " + net);
        }
        if(!net.getSource().getInstance().getType().equals(PrimitiveType.TIEOFF)){
          failAndExit("1. This case is unexpected. Talk to Chris about getting it implemented.");
        }
        
        instancesToRemove.add(net.getSource().getInstance());
        
        for(Pin pin : pins){
          // Remove the IOB instance
          if(isTriState(pin.getInstance())){
            failGracefully("This design contains tri-state IO, which is not yet supported by the HMG.");
          }
          instancesToRemove.add(pin.getInstance());
          
          // Create New Net and static SLICE source with Pin connected to static SLICE
          Net newNet = new Net(pin.getInstance().getName() +"_"+ net.getType(), NetType.WIRE);
          Instance inst = createStaticSliceSource(net.getType());
          placeStaticSlice(inst, true);
          Pin newPin = null;
          if(design.getExactFamilyName().contains("virtex4")){
             newPin = new Pin(true,"Y",inst);
          }else if(design.getExactFamilyName().contains("virtex5")){
            //TODO V5
            newPin = new Pin(true,"D",inst);
          }
          newNet.replaceSource(newPin);
          netsToAdd.add(newNet);
          instancesToAdd.add(inst);
          Port newPort = new Port(pin.getInstance().getName()+"_outport",newPin);
          hardMacro.getPorts().add(newPort);
          newPin.setPort(newPort);
        }
      }
    }
    else{ // This is just a single IOB
      // There should only be 1 pin 
      Pin pin = pins.get(0);
      // Remove IOB
      if(isTriState(pin.getInstance())){
        failGracefully("Sorry, this design contains tri-state IO.  Tri-state IO is not yet supported by the HMG.");
      }
      instancesToRemove.add(pin.getInstance());
      net.getPins().remove(pin);
      net.getPIPs().clear();
      
      if(pin.isOutPin()){
        // Check if this net drives the BUFG, if so, we don't want to create any ports
        // We'll do that with the output of the BUFG
        for(Pin p : net.getPins()){
          if(p.getInstance().getType().equals(PrimitiveType.BUFG)){
            netsToRemove.add(net);
            return;
          }
        }
        // CASE 1:
        // CASE 2:
        // Now create a port, we just choose an arbitrary one if there are more than one
        Pin p = net.getPins().get(0);
        //XDL_Pin p = pins.get(0); -- This is wrong here because we already removed this pin
        Port newPort = new Port(pin.getInstance().getName()+"_inport",p);
        hardMacro.addPort(newPort);
        p.setPort(newPort);
      }
      else{
        // Check if this is a static net
        if(net.isStaticNet()){
          if(!net.getSource().getInstance().getType().equals(PrimitiveType.TIEOFF)){
            failAndExit("2. This case is unexpected. Talk to Chris about getting it implemented.");
          }
          
          instancesToRemove.add(net.getSource().getInstance());
          netsToRemove.add(net);
          
          // Create New Net and static SLICE source with Pin connected to static SLICE
          Net newNet = new Net(pin.getInstance().getName() + "_" + net.getType(),NetType.WIRE);
          Instance inst = createStaticSliceSource(net.getType());
          placeStaticSlice(inst, true);
          Pin newPin = null;
          if(design.getExactFamilyName().contains("virtex4")){
             newPin = new Pin(true,"Y",inst);
          }else if(design.getExactFamilyName().contains("virtex5")){
            //TODO V5
            newPin = new Pin(true,"D",inst);
          }
          newNet.getPins().add(newPin);
          newNet.replaceSource(newPin);
          netsToAdd.add(newNet);
          instancesToAdd.add(inst);
          Port newPort = new Port(pin.getInstance().getName()+"_outport",newPin);
          hardMacro.getPorts().add(newPort);
          newPin.setPort(newPort);
        }
        else{
          
          // CASE 3:
          // CASE 4:
          Pin p = net.getSource();
          Port newPort = new Port(pin.getInstance().getName()+"_outport",p);
          hardMacro.getPorts().add(newPort);
          p.setPort(newPort);
        }
      }
    }

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        }else if(design.getExactFamilyName().contains("virtex5")){
          //TODO V5
          newPin = new Pin(false,"D1",newLUT);
        }
        net.getPins().add(newPin);
        Port newPort = new Port(pin.getInstance().getName()+"_outport",
            newLUTPin);
        hardMacro.getPorts().add(newPort);
        newLUTPin.setPort(newPort);
      }
      else{
        inPin = pin;
      }
      
      // Remove the IOB instance
      instancesToRemove.add(pin.getInstance());
      net.getPins().remove(pin);
    }  
    if(net.getPins().size() < 1){
      failAndExit("ERROR: Check net: " + net.getName());
    }
    boolean containsBUFG = false;
    Pin bufgPin = null;
    for(Pin p : net.getPins()){
      if(p.getInstance().getType().equals(PrimitiveType.BUFG)){
        containsBUFG = true;
        bufgPin = p;
      }
    }
    if(!containsBUFG){
      Port newPort = new Port(inPin.getInstance().getName()+"_inport",
          net.getPins().get(0));
      hardMacro.getPorts().add(newPort);
      net.getPins().get(0).setPort(newPort);
        
    }

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      case END_MODULE:
        expect(SEMICOLON, token, ParserState.END_MODULE);
        design.addModule(currModule);
        for(int i = 0; i <portNames.size(); i++){
          String key = portInstanceNames.get(i) + portPinNames.get(i);
          currModule.addPort(new Port(portNames.get(i), modPinMap.get(key)));
        }
        portNames = null;
        portInstanceNames = null;
        portPinNames = null;
        modPinMap = null;

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Related Classes of edu.byu.ece.rapidSmith.design.Port

edu.byu.ece.rapidSmith.design.parser.DesignParser

edu.byu.ece.rapidSmith.util.HardMacroGenerator

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